O(n)-depth modular exponentiation circuit algorithm
Teruo Hamano, Naofumi Takagi, Shuzo Yajima, F. P. Preparata · IEEE Transactions on Computers · 1997
An O(n)-depth polynomial-size combinational circuit algorithm is proposed for n-bit modular exponentiation, i.e., for the computation of x/sup v/ mod m for arbitrary integers x, y, and m represented as n-bit binary integers, within bounds 2/sup n-1//spl les/m<2/sup n/ and 0/spl les/Ix, y