A new built-in test scheme for DCVS circuits
N. Vasanthavada, N. Kanopoulos · 2003
A new built-in-test (BIT) scheme for differential cascode voltage switch (DCVS) circuits is presented. The scheme implements a mixed test strategy, combining both offline and online tests, and achieves very high transistor-level fault coverage as well as low error detection latency. The scheme has the additional merits of minimal impact on circuit performance and very reasonable hardware overhead.>