FPGA based Agile Algorithm-On-Demand Co-Processor
R. Pradeep, S. Vinay, Sanjay Burman, Veezhinathan Kamakoti · Design, Automation, and Test in Europe · 2005
With the growing computational needs of many real-world applications, frequently changing specifications of standards, and the high design and NRE costs of ASICs, an algorithm-agile FPGA based coprocessor has become a viable alternative. We report the general design of an algorithm-agile coprocessor and the proof-of-concept implementation.