Multi-application mapping algorithm for Network-on-Chip platforms
Bo Yuan Yang, Liang Guang, Thomas Canhao Xu, Tero Säntti, Juha Plosila · 2010
Multi- and many-core architectures have become the mainstream computing platforms for implementing Systems-on-Chip (SoC). To efficiently utilize the abundant processing resources on future many-core Network-on-Chip (NoC) platforms, the design focus should shift from single-application to multi-application scenarios. In this paper, we propose a multiple application mapping algorithm which maps multiple applications simultaneously onto different regions on the NoC. By optimizing the placement of both applications and tasks, the algorithm aims at shortening the average communication distance which in turn achieves lower network latency and energy consumption for a set of applications. The experimental results show that, compared to the random mapping, the proposed algorithm achieves 59% and 58% reductions of average network delay and energy consumption respectively.