Placement of microinstructions in a two-dimensional address space
John F. Wakerly, Clifford R. Hollander, Daniel Davies · 1975
The problem of addressing a large address space with a limited number of address bits is an old one [Bell and Newell, 1971]. The problem occurs in mini-computers which, with their short instruction word lengths of 12 to 16 bits, allocate only 8 to 12 bits of each instruction for specifying operand addresses. Hence each instruction can directly access only 28 to 212 words of memory. In order to access the remainder of a large (say 216 word) memory, mechanisms such as bank switching, page registers, base registers, zero/current page addressing, and indirection have been used. Each of these mechanisms allows a subset of the entire address space to be accessed easily while requiring some additional overhead to access the remainder.