RNS approach to fast dividers
G.C. Cadarilli, R. Lojacono, Mário Sérgio Salerno · International Conference on Acoustics, Speech, and Signal Processing · 2003
The authors propose a residue number system (RNS) architecture that realizes fast division. This architecture is fully developed in the particular case of eight-bit wordlength; in this case significant simplifications are reached. The whole divider appears as a combinatorial structure. A layout of the proposed architecture has been realized in a 1.5- mu m CMOS technology, SPICE simulation of the circuit extracted from this layout has shown the overall propagation time in performing the division to be about 100 ns.>