Logic optimization on a concurrent processing computer
Frans Theeuwen · European Design Automation Conference · 1990
Optimization of combinational logic plays an important role in the automatic synthesis of integrated circuits, often called Silicon Compilation. The optimization program rewrites a given set of boolean expressions in such a way that, after mapping the expressions onto a set of library cells, an optimal result will be obtained. This optimality can be in terms of area (number of transistors), speed, power consumption or a tradeoff between them. Particular controllers are suitable to be optimized with such a program. A number of packages are developed and described in literature [Thee], [Bar], [Bray]. One of the problems with these packages is the long computer runtime needed for large real world problems. This paper describes the implementation of a logic optimization package described in [Thee] on a supermini computer (The Alliant FX-8) which is able to execute a job concurrently on a number of CPU's. For our application is was necessary to rearrange the program flow in such a way that large parts of the computational work can be done concurrently by different CPU's. To be able to run the program in parallel successfully the next conditions have to be fulfilled:1. The time consuming program parts have to be executed in parallel. This requires that these parts have to be splitted up in a number of subtasks that can be executed (nearly) independent from each other.2. The memory management must be able to support concurrent processing.The paper describes the datastructures and the memory functions that are developed, also details about the implementation of the concurrent parts of the program will be given. A table showing promising results is given.