Counter based superscalar instruction issuing
Sorin Cotöfană, Ben H. H. Juurlink, Simon Vassiliadis · Proceedings of the 26th Euromicro Conference. EUROMICRO 2000. Informatics: Inventing the Future · 2002
New techniques for superscalar instruction issuing are presented. It is shown that the data dependency check for both in-order and out-of-order issuing can be performed in O(log w) gate delay using O(w/sup 2/) primitive gates, where w is the size of the instruction buffer. Furthermore, we present a new counting-based technique for assigning instructions to resources. It requires a delay of O(log w + log m) and an area of O(w/sup 2/log m + mw log k), where m is the number of instruction classes and k is the number of functional units. Finally, we investigate the consequences of executing the data dependency check in parallel with the resource conflict check.