Max-Testable Class of Sequential Circuits having Combinational Test Generation Complexity
Debesh Kumar Das, Tomoo Inoue, Susanta Kumar Chakraborty, Hideo Fujiwara · 2005
The paper uses the concept of time expansion model (Innoue et al., 2000) to find the test generation for acyclic sequential circuits. It identifies a class of sequential circuits called as max-testable sequential circuits, where test generation can be obtained using a combinational test generator with the capability of detecting multiple faults on a kernel of combinational circuit. Any acyclic sequential circuit without hold registers belongs to this class. For the sequential circuits having hold registers, a subset of such circuits is found to be belonged to max-testable class. The paper also suggests an algorithm to find such class of circuits.