2D systolic solution to discrete Fourier transform
Keith John Jones · IEE Proceedings E Computers and Digital Techniques · 1989
A number of systolic architectures have appeared over the past few years for performing the discrete Fourier transform (DFT) and fast Fourier transform (FFT) algorithms, using both linear and orthogonal processing networks. The paper shows how a rectangular array of N CORDIC (co-ordinate digital computer) processing elements can be used to carry out an efficient two-dimensional systolic implementation of the N-point DFT, offering highly attractive throughput rates in relation to other N-processor solutions, such as the conventional linear systolic array.