A built in self test scheme for automatic interconnect fault diagnosis in multiple and single FPGA systems
Mohammed Y. Niamat, Arunjit Sahni, Mohsin M. Jamali · Conference proceedings · 2007
Multiple-FPGA systems, comprising of several FPGAs, present a unique opportunity for self test. Past researchers in the area of FPGA testing have mostly focused on devising techniques for testing individual FPGAs; some focusing on testing Configurable Logic Blocks (CLBs), while others, on the interconnects. However, in many applications, multiple FPGA devices are present on the same board. In this paper, we focus on testing the interconnects of individual FPGAs in such an environment. Our research provides a unique technique for detecting the faulty FPGA in a multiple FPGA setting, and also for identifying the faulty interconnect(s) within the device. Four Xilinx XCV50 devices are used as a model for the multiple-FPGA system. Various global lines, long lines, local lines, and programmable switch matrices are tested for stuck-at and bridging faults. However, we do not attempt to test the physical inter-connections between the FPGAs which are outside the devices. A novel automatic diagnostic procedure for locating the faults is developed by producing, what we call, a 'faulty-word'. The various bits of this word provide the information on the location of the fault.