Calibrating clock stretch during AC scan testing
Jeff Rearick, Richard W. Rodgers · 2006
Delay fault testing via AC scan is shown to suffer from test application problems that, if not accounted for, will cause a reduction in test quality. The problem of clock period stretching is demonstrated, and a novel circuit for calibrating this effect is described. Guidelines for AC scan test application on the tester to improve the quality of AC scan tests are presented, along with results from several large ASICs.