High level synthesis for reconfigurable datapath structures
Lisa M. Guerra, Miodrag Potkonjak, Jan M. Rabaey · 1993
High level synthesis techniques for the synthesis of restructurable dutapaths are introduced. The techniques can be used in applications such as design for fault tolerance against permanent faults, design for yield improve-ment, and design of Application Speci$c Programmable Processors. This paper focuses on design techniques for Built in Self Repair (BLYR), which addresses the jirst two of these applications. The new BISR methoablogy consists of two approaches which exploit the design space explora-tion abilities of high level synthesis. The jirst method uses resource allocation, assignment, and scheduling, and the second uses transformations. The qfectiveness of the approaches are verljied on a set of benchmurk examples. 1