A 72 Mb/s PRML disk-drive channel chip with an analog sampled-data signal processor
R.G. Yamasaki, Tingzhe Pan, Mike Palmer, Donald F. Browning · 2002
A high performance, 72 Mb/s PRML read/write channel chip has read path adaptive equalization, Viterbi metric calculation, and timing recovery functions accomplished with an analog sampled-data processor (SDP). The 1 /spl mu/m BiCMOS chip nominally operates at 100 Mb/s (112 MS/s) over a 0/spl deg/C to 70/spl deg/C temperature and /spl plusmn/10% supply voltage range. It nominally dissipates less than 800 mW from 5 V at 100 Mb/s.>