An External Memory Interface for FPGA-Based Computing Engines
Joon-Seok Park, Pedro C. Diniz · Field-Programmable Custom Computing Machines · 2001
Commercially available synthesis tools offer limited capabilities when dealing with external memories. This problem is exacerbated by the diversity of each vendor-specific interface. Often vendor interfaces are specified in structural VHDL and where timing and its latency models are not directly exposed to the synthesis tools. As a result designers are faced with the tenuous tasks of manually matching the design specification to the vendor-provided interface.