A design methodology to implement memory accesses in high-level synthesis
Christian Pilato, Fabrizio Ferrandi, Donatella Sciuto · 2011
Nowadays, the memory synthesis is becoming the main bottleneck for the generation of efficient hardware accelerators. This paper presents a design methodology to efficiently and automatically implement memory accesses in High-Level Synthesis. In particular, the approach starts from a behavioral specification (in pure C language) and a set of design constraints, such as the memory addresses where some of the data are stored.