Kernel formation in Garpcc
T. Callahan · 2003
The Garp project (Mahlke et al., 1992) quantitatively investigates the benefits of adding an on-chip dynamically reconfigurable coprocessor to a standard instruction processor. Intended for acceleration of loops, Garp's coprocessor performs iteration control and both streaming and random memory accesses without assistance from the instruction processor. The companion project Garpcc (Callahan, 2002) investigates whether new compilation approaches can enable automatic exploitation of the coprocessor starting from standard C code. No hints regarding hardware/software partitioning are expected, although profiling data is assumed. A key technique used by Garpcc is to exclude rarely taken control paths from the coprocessor implementation of the loop (Callahan and Wawrzynek, 1998); when an iteration takes an excluded path, control hops back to the instruction processor to execute the remainder of that iteration, and control returns to the coprocessor at the start of the next iteration. The set of included paths is called the kernel of the loop.