Enhancement of erase speed using silicide drain in nanowire SONOS NAND flash memory
Wandong Kim, Il Han Park, Seongjae Cho, Dong Hua Li, Jang-Gn Yun, Byung‐Gook Park · 2009
Since recent mobile electronic devices have started to adopt NAND flash memory as their main data storage device, the demand for low cost and high density NAND flash memory has been rapidly increasing. As a promising candidate, nanowire SONOS NAND flash memory array has been introduced and reported for highly scalable device structure. However, since it is hard to bias floating body of memory cells, a reliable erase operation is not easy for nanowire NAND flash memory technology. So, a method which uses the hole current generated by GIDL near the select gate has been proposed for erase operation of this structure.This paper investigates a new method for significantly enhancing the erase speed of nanowire SONOS NAND flash memory through the use of silicide drain. Compared with the array which has the conventional n-doped drain, the proposed array structure has much faster erase speed because of the lower and narrower barrier. And, on-state cell current degradation caused by Schottky barrier can be negligible on condition that drain bias is over 1V. This result can be useful in gate-all-around type NAND flash memory design.