Logic synthesis for efficient pseudoexhaustive testability
Andrzej Kraśniewski · 1991
A method for designing combmationsd circuits suitable for pseudoexhaustive testing is presented.Unlike the conventional approach, where the development of a pseudoexhaustive testing scheme is an afterthought of the functional design, in our method the testabtity criteria are included in the mainstream of the logic synthesis process.The experimental results indicate that a significant reduction of testing time at a negligible area/performance penalty can be obtained its the circuits designed using the proposed procedure.