RSA decryption using the one-hot residue number system
William A. Chren, C.H. Brogdon · 2002
The design of an RSA decryption circuit which uses the One-Hot Residue Number System is presented. Large modulus adders and multipliers are described which reduce the area of previous (barrel shifter-based) designs while preserving their low power and speed. An analytical estimate of the delay-power product of the decryption circuit is computed.