A 1 GHz flash-ADC module in VMEbus
P. von Walter, A. Rausch · IEEE Transactions on Nuclear Science · 1992
A data acquisition module based on monolithic high-speed flash-analog-to-digital-converter-chips is described. Four fully independent channels, with 250 MHz sampling rate and a 2 kbyte buffer memory each, can be combined (interleaved) in one channel to achieve an effective 1-GHz sampling rate with a total of 8 kbyte memory depth. The double Eurocard board supports standard 16-b or 32-b VMEbus protocol for high-speed readout. The board is essentially self-contained and can be used cost-effectively in small applications and in large experimental setups. The performance of the data acquisition module has been tested.>