Fault simulation in a distributed environment
Patrick A. Duba, Rabindra K. Roy, Jacob A. Abraham, William A. Rogers · Design Automation Conference · 1988
Fault simulation of VLSI circuits takes considerable computing resources and there have been significant efforts to speed up the fault simulation process. A distributed fault simulator implemented on a loosely-coupled network of general-purpose computers is described. The techniques used result in a close to linear speedup and can be used effectively in most industrial VLSI CAD (computer-aided design) environments. >