What is majority/minority network synthesis?
Niraj Kumar Jha · ACM SIGDA Newsletter · 2008
Majority (minority) network synthesis uses majority (minority) gates as logic elements. A majority (minority) gate has three inputs and one output and produces an output value 1 when a majority (minority) of input values are 1. Thus, the majority function, M, corresponding to a majority gate is given by M(x1,x2,x3) = x1x2 + x2x3 + x1x3 The minority function, m, is simply given by M' (the complement of M).