Exact evaluation of memory size for multi-dimensional signal processing systems
Florin Balasa, Francky Catthoor, Hillarie Man · 1993
Memory cost is typically responsible for up to 80% of the chip and/or board area of most video and image processing system realisations. In this paper, we present a novel technique -- founded on data-flow analysis -- which allows to address the problem of background memory size evaluation for a given nonprocedural algorithm specification. Usually, the number of signal instances is huge, so a new data-flow model grouping scalar signals in so-called basic sets is proposed. The method also incorporates a way to trade-off memory size with computational and controller complexity. 1 Introduction Application studies in the areas of speech, image and video processing indicate that between 50 and 80% of the area cost in (application-specific) architectures for real-time multi-dimensional signal processing (RMSP) is due to memory units, i.e. single or multiport RAMs, pointer-addressed memories, and register files. This cost would further increase if the data-paths would be optimised without c...