Data-flow assisted behavioral partitioning for embedded systems
Samir Agrawal, Rajesh K. Gupta · 1997
In this paper we present a novel compiler-directed approach tosystem-level partitioning for a given description of system functionalityin a hardware description language (HDL). The algorithmis based on a definition-use analysis of the storage in the systemmodel to ensure that the resulting portions can be implemented in aloosely-coupled multi-rate execution model with minimal synchronizationbetween the portions. The cost of the hardware-softwareinterface, in terms of amount of buffering required, is computed accuratelyas a part of the partitioning cost function using a data-flowreaching analysis. The proposed algorithm has been implementedand experimental results show up to 65% improvement in buffersizes over the min-cut partitioning algorithm.