Improving FSMD design assurance
Richard Auletta · 2002
Assurance is a critical factor in the application of EDA tools to ASIC design. An experimental environment for high-assurance rapid prototyping using an application specific language, formal verification, and circuit synthesis for the design of communicating FSMDs has been successfully demonstrated. Digital design paradigms that consider both the digital and verification domains can integrate symbolic model verification with synthesis to improve and shorten the design cycle.>