A high-speed parallel DSP architecture dedicated to digital modem applications
S. Philip, F. Monteiro, A. Dandache, B. Lepley · 2002
This paper presents the architecture of a high-speed digital signal processor (DSP) designed for high rate digital modem applications. This work stands as a part of an EURICO European project, whose target is the design of a TV cable modem. First, some aspects of the TV cable digital modem application are presented. Then, the paper describes the DSP architecture, based on a VLIW core processor and on auxiliary dedicated modules (ADM). The architectural choices and the main advantages are discussed. Last, the general structure of the ADMs is discussed through an example: the implementation of a cyclic redundancy checking (CRC) dedicated ADM.