Addressing Test Generation Challenges for Configurable Processor Verification
Michal Rimon, Yossi Lichtenstein, Allon Adir, Itai Jaeger, Michael Vinov, S. Johnson, Dharmesh Jani · Proceedings · 2006
Having only recently entered the mainstream, configurable processor technology already provides practical automated hardware design. In this paper, we address the challenges of verifying these software-constructed hardware artifacts and show that sophisticated automation is mandatory. We describe how a model-based test generation technology was integrated into the verification flow of a configurable processor design. We report on experiments with two complex verification tasks. In both experiments, the model-based technology has achieved much higher coverage than standard verification tools and required considerably fewer engineering resources. We conclude that processor-oriented test generation technology addresses well the challenges of verifying automated hardware design