An experimental analog CMOS self-learning chip
G. M. Bo, Daniele D. Caviglia, Hussein Chiblè, Maurizio Valle · 2003
The analog VLSI implementation of an on-chip learning neural network is discussed in this paper. The multi layer perceptron paradigm and back propagation learning rule have been mapped onto analog circuits. A local learning rate adaptation rule has been also considered to improve the training performance (i.e., fast convergence speed). Experimental results confirm the chip functionality and the soundness of our approach.