A regularity-driven fast gridless detailed router for high frequency datapath designs
Sabyasachi Das, S.P. Khatri · 2001
We present a new detailed routing methodology specifically designed for datapath layouts. In typical state-of-the-art microprocessor designs, datapaths comprise about 70\% of the logic (excluding caches). Although research on datapath placement and global routing has been reported, very little research has been reported in the area of detailed routing for datapaths.