Diagnostic test pattern generation for sequential circuits
Ismed Hartanto, V. Boppana, Janak H. Patel, W.K. Fuchs · 2002
A method to perform diagnostic test generation in sequential circuits by modifying a conventional test generator is presented. The method utilizes circuit netlist modification along with a forced value at primary input in the modified circuit techniques to reduce the computational effort for diagnostic test pattern generation in sequential circuits. Speed-up of the diagnostic ATPG process is achieved by the identification of states that are impossible to justify with three-valued logic.