Scheduling and module assignment for reducing BIST resources
Ishwar Parulkar, Sandeep K. Gupta, M.A. Breuer · 1998
Built-in self-test #BIST# techniques modify functional hardware to give a data path the capability to test itself. The modi#cation of data path registers into registers #BIST resources# that can generate pseudo-random test patterns and#or compress test responses, incurs an area overhead penalty. We show how scheduling and module assignment in high-level synthesis a#ect BIST resourcerequirements of a data path. A scheduling and module assignment procedureis presented that produces schedules which, when usedto synthesize data paths, result in a signi#cant reduction in BIST area overhead and hence total area.