Inverterless Cauchy Cells for a Systolic Reed-Solomon Encoder
M.A. Hasan, V.K. Bhargava · 2005
Summary Consider an (n, k) Reed-Solomon (RS) code of length n = q - 1 and redundancy r = n - IC over the finite field GF(q). The usual implementation of the RS encoder consists of an T stage feedback shift register [1]. In some very high speed applications, the presence of the accompanying global feedback path restricts the speed of the encoder. Recently, Seroussi has proposed an architecture for the RS encoder [a]. Unlike the usual implementation of the RS encoder, Seroussi’s architecture does not require any global feedback path. Furthermore, the architecture is of systolic type and has modular a structure- it consists of one pre-processing cell and T Cauchy cells [2]. This modularity feature of the encoder makes it suitable for hardware implementation. The circuit complexity of Seroussi’s RS encoder depends essentially on the Cauchy cells. Each Cauchy cell computes one parity symbol for the RS code and contains one parallel type divider for the finite field GF(q). Unfortunately, the realization of a divider is much more complicated than that of a multiplier 131. Let M denote the circuit complexity of a parallel type multiplier of GF(q), where q = pm, p is prime and m is a nonzero positive integer. Then the circuit complexity of a modular parallel divider is, in general, O(mM) and that of Seroussi’s RS encoder is O(rmM). In this paper, we extent Seroussi’s work. It is shown here that the Cauchy cell can be implemented without any divider. The proposed Cauchy cell also has a shorter logic path and yields an RS encoder which has a circuit complexity O(rM).