New VLSI systolic array design for real-time digital signal processing
Haiyan Lin · IEEE Transactions on Circuits and Systems · 1986
The well-known advantages of pipelines systolic array architecture is applied for implementation of a second-order recursive digital filter. The proposed structure achieves five-fold increase in system throughput over standard techniques, and two-fold increase over usual systolic approaches. In this letter, the data flow operation and the basic cell implementation for this design are presented.