An automatic circuit diagram reader with loop-structure-based symbol recognition
彰夫 岡崎, Takashi Kondo, K. Mori, S. Tsunekawa, Eiji Kawamoto · IEEE Transactions on Pattern Analysis and Machine Intelligence · 1988
A high-performance logic circuit diagram reader was developed for VLSI-CAD data input. Almost all logic circuit symbols include one or more loop structures. A description is given of an efficient method for recognition of these loop-structured symbols. The proposed method consists of two processes: symbol segmentation and symbol identification. Symbol identification is achieved by a powerful hybrid method which uses heuristics to mediate between template matching and feature extraction. The entire symbol recognition process is carried out under a decision-tree control strategy. The entire recognition system for circuit diagrams is briefly explained, including character string recognition and connecting line analysis.>