Realistic fault extraction for boards
José T. de Sousa, Tunan Shen, Peter Y. K. Cheung · 1996
Extraction of realistic faults in boards can improve test synthesis, fault coverage, diagnostic resolution and repair time. A methodology and a tool for board inductive fault analysis is proposed. Results on real examples prove the e#ciency of the approach. The fault extraction method presented in this paper was inspired by previous work done at AT&T #1#, and also by similar work at the chip level done at INESC #2#. The great majority of faults in boards are caused by solder related open#short defects. Open defects can be obtained from the schematics whereas short defects depend on the layout and must be extracted from it. Our method extracts any short from a solder point P of a net to the closest candidate point Q of a neighbour net, if the distance PQ is lower than a maximum radius R. Solder and candidate points are user de#ned. For N nets the time complexityisO#N 2 #. The fault extraction process was implemented by modifying a public domain programme named Pcb #3# which runs o...