An approach for PSL assertion coverage analysis with high-level decision diagrams
Maksim Jenihhin, Jaan Raik, Raimund Ubar, Tatjana Shchenova · 2010
The paper presents an approach for assertion coverage analysis targeted at quality assessment of simulation-based verification stimuli and design error debug. The approach considers high-level decision diagrams based design verification flow and relies on temporally extended high-level decision diagrams for PSL assertion representation. The discussed case study illustrates the advantages of the proposed idea.