Levelwise algorithms for vector processing of sparse power system matrices
Mario Montagna, G.P. Granelli, G.T. Vuong, Richard Chahine · IEEE Transactions on Power Systems · 1996
Algorithms exploiting factorization path graph levels have been proposed in order to obtain a fine grain scheduling of sparse matrix operations suitable for vector/parallel processing. This paper deals with the problem of how to make levelwise algorithms more computationally efficient on vector processors. Existing implementations of (static) levelwise algorithms are reconsidered, showing that the recursive nature of the update operations is the bottleneck of the computation. A novel dynamic levelwise algorithm that is capable of overcoming the recurrence problem is proposed. It is based on reforming the level sets each time a new batch of vectorizable operations is scheduled. Test cases consist of the factorization and FIB substitution using sparse power system matrices with dimensions of up to 12000. The tests are carried out on a CRAY Y-MP C94/2128 vector computer. Speed-ups of about one order of magnitude have been achieved by the dynamic levelwise algorithm compared to a standard sparsity-based algorithm.