Dynamic rate scaling of coded digital video for IVOD applications
Jiansong Wang, Sile Yu · IEEE Transactions on Consumer Electronics · 1998
In this paper, a memory scalable architecture for rate scaling of pre-coded digital video is proposed. In this architecture, the anchor frames are compressed and scaled to fit the size of the memory used as the frame store, and motion compensation is performed in frequency domain. Its advantages include memory saving and memory scalability which make it possible to allocated the memory resource according to the on-line payload of the system in the VOD environment. Therefore, both high efficiency and flexibility can be obtained in respect of the utilization of memory. Another problem addressed in this paper is the rate control of the rate scaling transcoder. As a matter of fact, the content creation encoding and rate scaling can be regarded as a two-pass encoding system. In this paper, a rate control algorithm with look-ahead bit allocation and direct AC DCT bit usage profile tracking is implemented in the rate scaling transcoder based on the results of the first pass encoding.