Automatic Topology-Based Identification of Instruction-Set Extensions for Embedded Processors
Laura Pozzi, Miljan Vuletić, Paolo Ienne · 2002
Embedded processors increasingly need specialisation to meet the challenging performance requirements in semicustom VLSI technologies under tight energy and area budgets. A key issue is being able to determine automatically useful specialisation features from high-level application code (e.g., C or C++). This paper addresses the design automation task for one of the possible forms of specialisation: the inclusion of ad-hoc functional units, possibly implemented on embedded reconfigurable logic. A formal approach to the identification of groups of operations for the ad-hoc unit is presented and a simple lightweight algorithm is shown; it partitions the application data-dependency graph into maximal regions with topological features important at microarchitectural level. Several benchmarks (mostly from MediaBench [9]) indicate, under generic microarchitectural assumptions, that even relatively simple operation groups can contribute significantly to speed-up complete applications (up to above 2 in best cases). Several possibilities to enhance the current technique conclude the paper.