Built-In Self-Test for Programmable I/O Buffers in FPGAs and SoCs
Siddarth Reddy Vemula, Charles E. Stroud · 2006
The first built-in self-test (BIST) approach for the programmable input/output (I/O) buffers in field programmable gate arrays (FPGAs) and configurable system-on-chip (SoC) implementations is presented. The I/O buffers are tested for their various modes of operation along with their associated programmable routing sources. A general BIST architecture, applicable to any FPGA or SoC with embedded FPGA core, is presented along with the capabilities and limitations of the approach. Experimental results are presented for BIST configurations developed for the I/O buffers in FPGAs including Atmel AT40K and Xilinx Virtex series as well as SoCs including Atmel AT94K series.