Dual core capability of a 32-bit DLX microprocessor
Dean Michael Ancajas, Anastacia P. Ballesil, John Richard E. Hizon, Eugene A. Opelinia, Joy Alinda Reyes, Allan Gordon L. Sepillo, Winston A. Sumalia, Wilson M. Tan · 2007
We report an implementation of a 32-bit DLX microprocessor capable of operating in a dual core environment. The processor was modified for it to be capable of operating atomic instructions, a requirement in a dual core environment. The dual core environment was simulated using a similar core acting as a pseudo slave core. The resulting processor can then be interfaced with another instance of the same processor to function as a dual core processor. It can also be interfaced with a DSP co-processor that is compatible with the handshaking protocols of the processor. The resulting implementation yielded a power reduction of 17.9% (due to a more efficient register file) and an area overhead of 23% (due to additional blocks needed for dual core capability) compared to previous DLX implementations of the laboratory.