Novel Reversible Multiplier Circuit in Nanotechnology
Masoumeh Shams, Majid Haghparast, Keivan Navi · 2008
Reversible computation is of the growing interests to power minimization having applications in low power CMOS design, quantum computing, optical information processing, DNA computing, bioinformatics and nanotechnology. This paper proposes a novel 4x4 bit reversible Multiplier circuit. It is faster and has lower hardware complexity compared to the existing designs. In addition, the proposed reversible multiplier is better than the existing counterparts in term of number of gates and number of garbage outputs. Haghparast and Navi recently proposed a 4x4 reversible gate called MKG. The reversible MKG gate can work singly as a reversible full adder. In this paper we use MKG gates to construct the reversible multiplier circuit. The proposed reversible multiplier circuit can multiply two 4-bits binary numbers. It can be generalized for NxN bit multiplication.