A monolithic Hough transform processor based on restructurable VLSI
F.M. Rhodes, J.J. Dituri, Glenn H. Chapman, B.E. Emerson, A.M. Soares, Jack I. Raffel · IEEE Transactions on Pattern Analysis and Machine Intelligence · 1988
The implementation of a Hough transform processor using a wafer-scale-integration technology, restructurable VLSI circuit is described. The Hough transform is typically used as a grouping operation in an image processing sequence. The transform discussed here groups pixels in order to extract linear features. This calculation is realized with a wafer-scale processor that allows a complete line extraction system to be integrated on a single PC board. Also discussed is the use of the CAD tools that allowed this processor to be realized without incurring silicon layout and processing overhead.>