Design of Analog Neural Programmable Optimizers in CMOS VLSI Technologies
Rafael Domínguez-Castro, Angel Rodriguez-Vazquez, J.L. Huertas · European Solid-State Circuits Conference · 1991
A 3?m CMOS IC is presented demonstrating by the first time the concept of an analog neural system for constrained optimization. A serial time-multiplexed general-purpose architecture is introduced for the real time solution of constrained optimization problems in MOS VLSI. This architecture is a fully programmable and reconfigurable one exploiting SC techniques for the analog part and making extensive use of digital techniques for programmability.