A 1 MHz compact digitally controlled perceptron integrated circuit implementation with process insensitivity
J.L. Pino, T.L. Sculley, M.A. Brooke · 2002
A fast, compact process and temperature insensitive perceptron neural network is introduced. The integrated circuit proposed forms one layer in a perceptron neural network that can be easily cascaded to form a multiple-layer network. The implementation realizes practical 8-bit two's complement digital weights. The perceptron implementation presented holds promise in that it has a highly predictable output independent of process parameters and thermal effects.>