A Josephson 2-bit arithmetic logic unit
Hiroshi Nakagawa, I. Kurosawa, S. Takada · IEEE Transactions on Circuits and Systems · 1987
A Josephson 2-bit arithmetic logic unit (ALU) is presented. A four-junction logic (4JL) gate-family is used in the ALU circuit. The ALU circuit is designed based on a dual-rail logic to perform both the arithmetic and the logic functions. The circuit was fabricated with Nb/Al-oxide/Nb tunnel junctions using a 3-{\mu}mminimum line width technology. For each 16 functions, the circuit was completely confirmed in consistent logic operations. The operating time was measured to be 165 ps in the arithmetic function of subtraction,AminusB. Power dissipation was estimated to be 581{\mu}Win the circuit.