Integrated services fast packet switching
X. Jiang, James S. Meditch · 2003
The architecture of a FP (fast packet) switch for integrated voice-data-video services is described. The switch employs autonomous processing units with local memory to store switching information and is built around a bit-parallel banyan MIN (multistage interconnection networks). The bit-parallel banyan MIN is used to minimize delay in executing all switching functions which are required for integrated services. A group switching protocol for video traffic is proposed in order to satisfy video delay constraints, and analytic models are developed to determine the switch's performance characteristics. It is shown that the switch readily achieves low delay and small blocking-and-loss probability for video traffic while still being able to utilize the remaining system bandwidth to serve voice and data traffic. It is concluded that the FP switch is a flexible and efficient architecture for integrated voice-data-video services switching systems.>