A Microprogrammable Memory Controller for high-performance dataflow applications
Jérôme Martin, Christian Bernard, Fabien Clermidy, Yves Durand · 2009
High-performance embedded dataflow systems require intensive data manipulation involving synchronization, buffering, duplication and reordering. Our Microprogrammable Memory Controller (MMC) is designed to handle these tasks more efficiently than the data processing cores. Dataflow management for several computing cores is combined in a single MMC. This reduces the global complexity and memory of the system. The MMC has been implemented in a 65nm low-power CMOS integrated circuit for baseband processing of OFDMA communications. It achieves a bandwidth of 24.6 Gbps @385 MHz, with an average 38 mW power consumption.