Reconfigurable blocks for digital power electronics applications in FPGA
Jatin Gangani, Amod Samant, Y. Srinivasa Rao · 2011
Power electronics control algorithms are relying increasingly on digital discrete-time implementation of basic blocks for development of power electronics applications. Flexible reconfigurable blocks capable of handling these algorithms in realtime is necessary. This paper discusses the effect of hardware-software partition and hardware accelerators on performance of basic modules. It is concerned with real-time implementation of a Bang-Bang digital PLL and a sinusoidal pulse width modulator on MSP-FPGA platform as reconfigurable blocks in order to reduce calculation time drastically and to perform computations within very stringent time frames based on parallel processing hardware circuit. MSP provides real-time data samples to Spartan 3 FPGA using 12-bit in-built ADC. In order to highlight the performance of above mentioned modules in FPGA, experimental time frames and power consumption estimation are reported and the advantages of FPGA based reconfigurable hardware are indicated.